An intellectual property (IP) block, or an IP core, is a predesigned subcircuit for use in larger designs. We provide IP cores that support the various devices on our University Program FPGA boards. The IP cores are available in an open-source format with complete documentation, and are distributed as part of the FPGA University Program Installer. The FPGA University Program IP Cores are listed in the table below. They are available for different versions of the Quartus® software. Use the filters below to choose the appropriate cores.

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